1. Technical Field
The present invention relates generally to a semiconductor circuit, and more particularly, to a semiconductor integrated circuit.
2. Related Art
In general, a semiconductor integrated circuit employs fuses is which are used to change various setting values, perform repair operations, and so on.
A fuse used in a semiconductor integrated circuit may be a laser fuse which is cut using a laser.
On the other hand, the fuse used in the semiconductor integrated circuit may be an electronic fuse of which an electrical characteristics is changed by applying a high voltage.
Referring to FIG. 1, an electronic fuse includes an anti-fuse.
The anti-fuse starts with a high resistance and is designed to create an electrically conductive path. For example, rupture bias voltages are applied to a source, a drain and a gate commonly connected with one another to rupture a gate oxide Gox so that the gate, the source, the drain and a bulk are connected with one another.
According to a known art, voltages VPPF and VBBF with a large voltage difference are applied to both ends of the fuse as the rupture bias voltages.
While a laser cutting type fuse cannot be used after packaging, the electronic fuse may be used, e.g., may be electrically cut or connected even after packaging.
For such an electronic fuse, a circuit for generating the rupture bias voltages may be included in the semiconductor integrated circuit, e.g., in a circuit configuration in which the electronic fuse is formed, or the rupture bias voltages may be provided from an external equipment.
Referring to FIG. 2, a known semiconductor integrated circuit 1 is configured to generate rupture bias voltages therein.
The semiconductor integrated circuit 1 includes power supply control blocks 12 and 13 and a fuse set 11.
The fuse set 11 may be provided in a plural number, and each fuse set 11 may include a plurality of electronic fuses.
The power supply control blocks 12 and 13 generate rupture bias voltages VPPF and VBBF using internal power sources VPP and VBB, respectively.
Here, the internal power sources VPP and VBB are power sources which are internally generated by a VPP pump (not shown) and a VBB pump (not shown), respectively.
In this regard, in the case where the rupture bias voltages VPPF and VBBF are generated using the internal power sources VPP and VBB, when compared to the case where the rupture bias voltages VPPF and VBBF are not generated internally using the internal power sources VPP and VBB, an increased number of charge pumps are needed. As a consequence, a circuit area increases, and it may be difficult to supply precise and stable rupture bias voltages.
Referring to FIG. 3, a known semiconductor integrated circuit 2 is configured to receive rupture bias voltages VPPF and VBBF from an external test equipment.
The semiconductor integrated circuit 2 includes dedicated terminals 16 and 17 for rupture biases, power supply control blocks 14 and 15, and a fuse set 11.
The dedicated terminals 16 and 17 for rupture biases are configured not to be used in a normal operation but to receive the rupture bias voltages VPPF and VBBF from the external test equipment only in a fuse rupture operation.
The dedicated terminals 16 and 17 for rupture biases may be package balls of an FBGA (fine ball grid array) or pads.
Also, the power supply control blocks 14 and 15 provide the rupture bias voltages VPPF and VBBF supplied through the dedicated terminals 16 and 17 for rupture biases, to the fuse set 11.
However, due to the area of the dedicated terminals 16 and 17, the size of the semiconductor integrated circuit may increase, and a circuit design related with power supply terminals may become complicated.